control register
5.Based on description above, the paper introduces the implementation of the hardware design on DSP and FPGA, In view of integration and modularization and the technology of IP core Reuse, a set of function circuits including peripheral Logic circuits of DSP, Manchester encoder and decoder, UART,ect. are integrated into a single FPGA. DSP control functions in FPGA through Control register.
8.For the real time performance need of the Low Speed Speech Compress Algorithm and the ASIC implement of the transfer process between programs, the design is put forward in the paper, in which state registers control the cross access between operator and memory, register windows are used for the parameters transfer, and the technique of hardware controlling is used to avoid pipeline conflict, so that the main problems of the transfer process in TR600 are solved effectively.
10.The main task of PLC realizing sequence control is to developa program for the users. This article takes a series of Japanese small-sized Programming Control of Mitsubishi as examples, and three basic programming methods — basic logical instructions, shifting register and step ladder are discussed.
