• 基本释义

1.This dissertation designs a high stability subsection D/A convertor with 12 bits signal input flip-latch. The converter is made up of a high stability subsurface zener benchmark power supplye, an inside 12 bits parallel digital signal input flip-latch,an authority current D/A conversion cell, a voltage-current conversion cell and an output operation amplifier.
本文设计了一个带锁存的高稳定性分段12位D／A转换器，本转换器由一个高稳定性的次表面齐纳基准源、内部12位并行数字输入锁存器、权电流D／A单元、电压—电流转换单元及输出运算放大器等六大部分组成。收藏指正
2.CMOS Ternary D-Type Edge-triggered Flip-Flop Using One Latch
一种单锁存器CMOS三值D型边沿触发器设计收藏指正
3.A novel CMOS ternary D type edge triggered flip flop using a single latch is presented.
提出了一种只使用单个锁存器的CMOS三值D型边沿触发器设计 .收藏指正
尝试查询