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1.An instruction where each parameter is independent of the others, for example, when moving data from memory to a floating-point register.
一条指令,其中一个参数与其它参数无关,例如,把数据从存储器传送浮点寄存器的指令。收藏指正
2.It is compatible with the industry-standard 80C51 instruction set and pinout. The 8K Bytes on-chip downloadable Flash ROMs allows the program memory to be reprogrammed In-System through an SPI serial interface or by a conventional nonvolatile memory programmer. It can fully static operate at 24 MHz.
它完全兼容80C51的指令和接口,内部集成了8K的FlashROM和256字节的RAM,支持串行口的在系统编程,运行速度可达24MHz。收藏指正
3.In this dissertation, the hardware/software co-design flow and AC3 decoding algorithm is analyzed and the AC3 audio decoding on the Virgo RISC-core. Then the extended instruction is added to lessen the CPU cycles used and to reduce the memory space used by the decoding program.
其次,本文在分析软硬件协同设计流程和AC3解码算法以及RISC核Virgo上实现AC3音频解码的基础上,扩展指令集增加特殊指令减少了AC3解码的时间和解码程序占用的空间。收藏指正
4.In order to estimate how the storage subsystem parameters influence the system performance, the address flow is simulated by random number sequence. An equal probability model is established to analyse the dispatching time of main memory and disc storage, and the distributions of the access time demanded by instruction flow and of the access time providing for data flow are presented.
了估算存储子系统参量如何影响系统性能,采用随机数序列模拟地址流,建立等概率模型分析主存和磁盘存储器的调度时间,并且提出了指令流“需数分布”和数据流“供数分布”等方法。收藏指正
5.Most modern microprocessors employ on-chip caches to bridge the enormous speed disparities between the main memory and central processing unit (CPU), but these caches consume a significant fraction of total energy dissipation, especially the power dissipated by instruction cache itself is often a significant part of the power dissipated by the entire on-chip caches.
现代微处理器大多采用片上Cache来缓解主存储器与中央处理器(CPU)之间速度的巨大差异,但Cache也成处理器功耗的主要来源,尤其是其中大部分功耗来自于指令Cache.收藏指正
6.Because of the complexity of the microprocessor structuing and the difficulty of its testing, the authors insert built-in-self-test (BIST) circuits in a microprocessor to test programmable-logic-array (PLA) in the instruction-decode unit and control-read-only-memory (CROM) in the execution unit.
由于微处理器结构复杂、测试困难,作者在微处理器设计中插入内建自测试(BIST)电路对指令译码部件的可编程逻辑阵列(PLA)电路和执行部件的控制只读存储器(CROM)电路进行测试。收藏指正
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