parallel logic
4.The UART CMOS chip of TTL16C550 is designed to realize the data communication exchange between the serial portion of RS-232 and the parallel portion of TMSVC5402.which can avoid writing the complicated software routine for McBSP of DSP, and has the advantages of simple programming,high transmission capability and reliability and real-time capability CPLD chip of CY37064VP84 is choosed to realize the logic control.
6.In this paper,a thinning-like (TL) property of cellular neural networks(CNN)with opposite-sign templates and a non-unity gain output function is discovered and proved. An image thinning algorithm is realized by a multi-layer CNN,which operates with the TL property,with four local logic units (LLU). An image edge detection is achieved by another parallel CNN with a LLU.

