process amplifier
4.In 1.6μm N-well BiCMOS process, simulation in HSPICE showed that, the design realized a CM range VCM reaching+7 V at a single supply voltage 2.7V, while the supply power was 2.7V. The design of the operational amplifier resulted in the performances of 3MHz bandwidth (at 72.5 of phase margin),open loop gain 62.5 dB.
6.The design and implement of cathode pulse amplifier are the basis in establishing the spot measurement system. The driving way of the cathode pulse amplifier during the s pot measurement process is also the key for producing the negative going video h igh voltage pulse with the high technical specification.
7.In this thesis, a L-band low noise amplifier (LNA), a SPDT (single-pole double-throw) Switch and a passive mixer in the RF front-end of the “Beidou”NO. 1 Receiver of Navigation and Positioning satellite are analyzed and implemented using TSMC 0.25μm CMOS process, which are prepared for full integration of receiver in the front-end.
8.A traveling-wave amplifier (TWA) with lossy transmission line was discussed. An integrated CMOS TWA with lossy on-chip spiral inductor was designed with 0.18 μm CMOS process, the simulated gain is over 15 dB on 14 GHz bandwidth. Besides, the gain of TWA versus the distributed parameters of lossy on-chip spiral inductor was simulated, and the simulated results have some guideline to the optimizing design of TWA.
