爱词霸英语   汉语   手机版   软件版下载 | English
每日一句:正在加载...
1.Some vendors shipped prestandard products that used programmable digital signal processor chips to implement their modem algorithms.
有些厂商交付了标准前的产品，它们采用可编程的数字信号处理器芯片，来实现Modem算法。收藏指正
2.A fully-digital control system based on digital signal processor (DSP) has been developed to implement the real-time control of series power quality controller.
本文应用数字信号处理器(Digital Signal Processor-DSP)设计并实现了串联型电能质量控制器的全数字实时控制。收藏指正
3.Developing ESMP (Embedded Streaming Media Processor) is the primary approach to implement this target and has become an important research interest in industry and academe.
开发嵌入式流媒体处理器是实现这一目标的主要途径，也是嵌入式流媒体处理技术的研究重点和研究热点。收藏指正
4.The Implement of Iges Post-Processor Based on Model Transformation
基于模型转换的IGES后处理器开发收藏指正
5.As for the encoding part with greater complexity, taking the system’s real time feature and the demand of performance-price ratio into accounted, the thesis adopts digital signal processor TMS320C54x DSP as main control chip to implement the optimized coding algorithms of MPEG-2 AAC LC profile.
而对复杂度较高的编码部分,为了满足系统的实时性和性价比要求,本文采用数字信号处理器 TMS320C54x DSP 芯片作为编码主控芯片,成功在 DSP 上实现了,经过本文改造 MPEG-2 AAC(LC Profile)后的编码。收藏指正
6.A novel architecture is proposed to implement FFT/IFFT processor with CPLD devices.
本文提出了一种新颖的FFT/IFFT处理器结构 ,并用可编程逻辑器件 (CPLD)实现了该结构 .收藏指正
7.Based on intelligent power module (IPM) and digital signal processor (DSP), this system used hack-EMF (electromotive force) method to implement the sensorless control for brushless DC motor of air conditioner (AC) in FCV.
该系统基于智能功率模块(IPM)和数字信号处理器(DSP)，采用反电势法实现了电动汽车空调用无刷直流电动机的无传感器控制。收藏指正
8.I am involved in "National Advanced Research Project", which is to implement LongtiumC2, a 32-bit embedded CISC processor.
本文来源于西北工业大学航空微电子中心所承担的国防“十·五”预研项目(编号:41308010307),作者参与完成了32位嵌入式CISC处理器龙腾C2的研究与设计。收藏指正
9.Second, for the design of SA-DCT, booth encoding is introduced for coefficients of DCT, and the design concept of programmable processor is adopted to computing various-length DCT while a novel transposed register array is proposed to implement the transpose operation necessary for SA-DCT. The proposed SA-DCT core costs about 12500 gates with the maximum power consumption of 2.54mW.
对于SA-DCT,采用Booth算法对DCT系数编码,用可编程处理器的概念实现不同长度DCT的变换,同时提出了一种新颖的转置寄存器阵列实现所必需的转置操作,整个结构面积为12500门,最大功耗为2.54mW。收藏指正
10.Guided by thelink time optimizer ALTO developed by Arizona University for Alpha, we implement theGLTO (Godson Link Time Optimizer) with consideration of the features of themicroarchitecture and instruction set of Godson-2 Processor.
我们参照Arizona大学为Alpha处理器设计的链接后优化器ALTO,针对龙芯2号处理器的微体系结构和指令集的特征,实现了龙芯上的链接后优化器GLTO(Godson Link TimeOptimizer)。收藏指正
尝试查询
汉英释义